The Nano-Tec gold coated silicon wafers are useful for thin film research, AFM / SPM, nanotechnology and biotechnology applications. The silicon wafers are coated with 50nm of pure gold over a 5nm adhesion layer of Ti. Both Ti and Au are deposited in a dedicated high vacuum deposition system with electron beam evaporation sources. The gold coating is not atomically flat; there are height differences in the nm range. The maximum use temperature is around 175°C; higher temperatures could result in delamination of the gold film. The Nano-Tec gold coated wafers are dividually packed in 2''wafer carrier trays for protection.
Specifications of the Nano-Tec gold coated Ø2”/51mm silicon wafers: